The field of radiation hardening in semiconductor devices deals in part with the problem of electron-hole pairs generated by the passage of ionizing radiation through the semiconductor devices. Electron-hole pairs generated in the bulk silicon do not present a severe problem, as the electrons and holes recombine rapidly. Electron-hole pairs formed in silicon dioxide are more difficult to deal with because the electrons are far more mobile than the holes and may become separated from the holes, making recombination more difficult and resulting in an accumulation of net positive charge in the silicon dioxide, or other dielectric film.
The conventional process for laterally isolating semiconductor circuits uses a field oxide between the active regions. The most common method of producing this field oxide is the localized oxidation of silicon (LOCOS) process. This results in a thick oxide layer separating adjacent semiconductor devices. This thick oxide layer is extremely susceptible to trapping positive charge in an ionizing environment. This effect is cumulative and eventually results in lowering of the threshold voltage of the parasitic field oxide transistors occurring under the field oxide, so that adjacent transistors are no longer isolated from one another.
N-Channel transistors, formed in a P-Well, separated by field oxide, are particularly affected by this phenomenon. The trapped positive charge in the field oxide repels positively charged carriers (holes) and attracts negatively charged carriers (electrons) in the surface of the underlying silicon layer. This accumulation of negatively charged carriers in the P-Well adjacent to the field oxide causes inversion of the P-type silicon and creates a conductive channel or leakage path between N-doped drain and source regions of adjacent N-Channel transistors. The accumulated negative charge in the P-Well region can also create a leakage path from the source to drain of a single N-Channel transistor, thus shorting out the N-Channel transistor. Another possible leakage path occurs between a P-Well active region adjacent to an N-Well active region, especially where polysilicon is used as an interconnect between both active regions. Thus, these undesirable parasitic transistors dominate circuit behavior and the circuit can no longer function as designed.
Conventionally, the area that will be the field oxide region is implanted before growth of the field oxide with an ion dose that is calculated to suppress the operation of parasitic transistors under normal (no ionizing radiation) environments and operating conditions. The field oxide is conventionally grown by a wet thermal process, using a LOCOS process or variations thereof. With the field implant process, there is a dopant gradient extending down into the substrate, with a high concentration at the surface changing to a background bulk concentration at some depth below the surface. The nature of the bulk silicon underlying the semiconductor circuit will depend on the nature of the process used to fabricate the circuit, such as NMOS, PMOS, or CMOS processes. Through the use of this method it is not possible to obtain the doping concentrations necessary to produce radiation hardened devices with acceptable performance for radiation doses greater than about 10 to 20 krad(Si).
Another known method is described in commonly owned U.S. Pat. No. 5,037,781 which teaches a process wherein a first high quality oxide layer is deposited over the silicon substrate. This first layer acts as a diffusion barrier. A second layer of a thick heavily doped oxide, containing recombination sites for the electrons and holes, is then deposited over the first layer. A second diffusion barrier of silicon dioxide is then deposited over the thick heavily doped layer. This art requires a unique manufacturing process which is substantially different from most commercial manufacturing processes and therefore adversely impacts the cost of radiation hardened devices.
Therefore, there exists a need for a radiation hardened semiconductor device capable of functioning in an ionizing radiation environment of approximately 100 krad(Si).
Furthermore, there exists a need for producing such a radiation hardened semiconductor device through modification of existing commercial semiconductor manufacturing processes.